Sunday, June 23, 2013

Amiga 500 buffered IDE controller


This is not the latest project, but the description was still missing, so here are the details of my own developed IDE controller. 

The original goal of this project was to connect an IDE HDD to the CPU bus of the Amiga 500 and try to send a command to it.

I have started to work on the hardware in 2012. december. The first version used a simple address decoder to map the disk registers to $200000 in the Amiga memory map. No data line buffers were used.

The test hard disk was an old Western Digital disk. The test program was written in assembly, using Devpac assembler.

Here are some pictures of the first version:
 

I was very happy once the hard disk accepted the first command sent to it. It was a motor down command, to turn the motor off and go to standby mode.

When it worked, I have tried to read the disk parameters and some data from the HDD.

The original goal has been achieved, but why not to enhance the system a bit? :) Thus, the next step was to create a more complex program: a music player which uses audio.device and plays some RAW audio data, reading the disk sectors directly (no filesystem is involved). The development was done on Amiga 4000, while the testing was realized on the final hardware, using my own developed serial downloader system.

This system also worked properly. Here is the Youtube video about the initial version: 


Meanwhile I also began to develop a device driver for the IDE system. On the Internet there are many open source drivers available for similar interfaces (Spartan etc.), all written in pure assembly. But I wanted to create a driver written in ANSI C (using SAS C compiler) and to fully avoid assembly. Unfortunately a such C based IDE driver template was unavailable. I have worked on the software cca. 2 months (writing it from the scratch) while the first version began to work. Here I send greetings and thanks to Ralph Babel for his help in the stack pointer issue.


The driver development was done using an A4000, while for testing first WinUAE, later a real A500 was used. Own developed downloader software has been used to transfer the binary files to the Amiga via a serial cable.

Driver development setup with Amiga 4000 and WinUAE
Driver testing setup with Amiga 4000 and Amiga 500
The next step was to test the system with various disks. Some disks worked, some didn't, CF cards also produced data corruption problems.

When data bus drivers were added some disks were still unusable. I have googled a lot to find a proper documentation about the IDE timing while finally found a solution: the /CS signal should be delayed after the address and data lines are asserted. After adding a quick a dirt fix (the delay signal is got from /DTACK, which is fixed on A500) every CF cards started to work properly.


The driver is still not optimized. The disk read speed is ~350 kB/sec on a plain Amiga 500 (measured with SysInfo 3.24). Adding real fast RAM the read speed is increased up to ~450 kB/sec. Don't forget, this is a simple PIO mode device, no DMA is available, thus this transfer rate is acceptable.


Current status


The IDE controller still sits on a breadboard, connected to the 4 MB fast RAM expander. The whole system is under testing. My lab Amiga 500 has Kickstart v 3.1 EPROM, 1 GB CF IDE "disk" and 4 MB fast RAM. Quite enough for playing WHDLoad games, isn't it? :)

IDE controller with 4 MB Fast RAM expander
Master / slave configuration is also supported, IDE IRQ is separated with an own IRQ register (all realized with TTLs). The IDE system maps to $e80000 and uses 64k block of memory with many aliased addresses (simple hardware).

WHDLoad games are working fine, however the 7 MHz CPU is very slow when then the disk image is compressed with XPK. Some games support exiting to Workbench, some don't (68020 is required for full support). Anyway, it is usable.





I have also tested this configuration to build a program written with SAS C 6.58. The compiling and linking is unusable slow, even the system has enough RAM available (GSTs are also enabled). SAS C requires a 020 or 030 CPU for comfortable work. 

The schematic diagram is available on the picture below.
 
Amiga buffered IDE controller schematic diagram

Future plans

Adding autoconfig feature, intergrate it with the DRAM controller and put the complete logic into FPGA to reduce the number of integrated circuits (and the size of the board).


Conclusion


Now go back in time and let's calculate a bit from the point of view of a programmer: in 1990-1992 40 MB HDD, 4 MB RAM and at least 68020 CPU was required to work with SAS C (maybe a bit less, older versions consume less resources - comments are welcome). The total price of hardware was 3000 DEM or more?! So, why people used assemblers to write programs (including commercial ones)? I think the answer is straightforward. ;)

11 comments:

  1. Hi.
    Thank for you proyect and diagram.
    Any update about this project?

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  2. There will be a CPLD controlled IDE CF + Fast RAM + Flash KickROM card available.

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  3. Hi.
    Sorry, where is the link for the CPLD version?
    Thks

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  4. It will be published soon. Stay tuned. :)

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  5. Hello.
    Me again.
    Something new?
    Sorry to ask again. Your project is very interesting.
    regards
    Fran

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  6. Look at the latest posts. :)

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  7. Great job! A question, this PCB should works with the default scsi.device in the system? (with the known limitations: not autoboot and 4Gb max hard disk). Regards. Jesús.

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  8. This controller is not scsi.device compatible. It has no Gayle emulation and uses different base address.

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    Replies
    1. Thanks for the reply, ms68k. Your base address is on $100000, isn't it? Regards. Jesús.

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