Tuesday, September 15, 2015

HC508 Amiga 500 accelerator card

Finally, the project has reached a stage when complete system tests are possible The integrated CF + IDE allows running the complete OS 3.1 with WHDLoad.

Key features:
  • 68HC000 CPU running at 50 MHz (100% MC68000 compatible)
  • 40 pin IDE connector for HDD, CD ROM etc.
  • Integrated CF card connector
  • 8 MB Fast RAM (1 wait state)
  • 512k FlashROM for Kickstart (1 wait state)
  • Utility for disabling / enabling every module separately (XCPU, XRAM, XROM, IDE)

The HDD read rate is really great: with an IDE HDD it produces 4.8-5 MB/s, while the CF card's transfer rate varies around 3.2 MB/s. On the picture below the IDE HDD read speed is shown.

As before, this (3rd) prototype board is also home made. Top and bottom views are available below:

And a small video which demonstrates the system performance. The complete OS 3.1 boots in 2 seconds from a CF card. Frontier is running with 40-50 FPS. Who needs more? :)

Sunday, July 12, 2015

Amiga 500 68HC000 accelerator running at 50 MHz

Surprise, surprise! :)

I have just redesigned the timing to run the Fast RAM at 50 MHz. The board still uses 60 ns DRAM chips; due to this one wait state is inserted in every Fast RAM access cycle. The results are not bad: it produces ~4.4 MIPS at 50 MHz (it was 3.3 MIPS at 32 MHz with 0 wait state 60 ns DRAM).

The waitstates are clearly visible on the timing diagram below: one CPU cycle takes 10 clock cycles instead of 8.

Stay tuned. More news are coming soon! :)

Friday, July 3, 2015

Amiga 500 28 MHz accelerator with DRAM

Hello Boys and Girls! [Melon - Prism :) ]

We have reached the next phase. Finally, 3 MIPS is "coming out" from the 68HC000 which is running at 28 MHz. The design uses 60 ns 0 wait state DRAM.

A phase correct, stable 28 MHz clock is still missing as it is not available on the expansion connector. Currently the 28 MHz clock signal is coming directly from the main quartz oscillator, from the motherboard (see the green wire). Once I obtain a proper PLL clock multiplier, this wire will be eliminated.

28 MHz 68HC000, 0 wait state 8 MB DRAM, 3 MIPS, autoconfig

And as always, some screenshots (SysInfo speedtest and Bustest results):

I have also tried to reach the barriers of the 68HC000CFN16. It works rock stable at 50 MHz and it is cold like an ice. :) Don't forget, it is a CMOS design and draws almost zero current (the power consumption of CPU is ~1.3 W). For the 50 MHz design SDRAM will be required in order to get out everything from the CPU (at 50 MHz the CPU cycles are ~45 ns (see the screenshot below), which don't fit the 60 ns RAM access time:

This design uses the same PCB as the 14 MHz version (rev 2). The measurements are done with a Zeroplus logic cube.

On the screenshot above the burst refresh cycles are shown. The next phase will be a completely new board design with IDE, CF, Flashkick, 8 MB RAM, 68HC000 @28 MHz etc.

Stay tuned!  :)

Tuesday, June 16, 2015

Amiga 500 14 MHz accelerator with DRAM (phase 2)

The 14 MHz accelerator card project has reached a stage when real speed measurements are made possible. Based on Sysinfo speedtest results, it produces exactly twice the speed of a real Fast RAM equipped Amiga 500. See the pictures below for the wonderful, long awaited results. :)

This is not a simple 14 MHz hack, which is available on aminet. An accelerator without 0 wait state RAM worths nothing, as the CPU is always waiting for the Chip RAM and register access. We can talk about a real accelerator if there is some 0 wait state RAM available.

This card contains a 68HC000 16 MHz CPU which is running at 14 MHz, 8 MB 0 wait state RAM, which is the maximum size of the real Fast RAM in an Amiga with 24 bit address bus.

The next version will be built on a complex PCB which will contain:

  • 14 MHz 68HC000 CPU
  • 8 MB RAM
  • IDE connector
  • CF card
  • Flashkick
  • NMI button etc.  
A500 68k turbo rev 2. (top)

A500 68k turbo rev 2. (bottom)
A500 68k turbo rev 2. (top)

A500 68k turbo rev 2. (bottom)

Sunday, June 7, 2015

FlashKick rev. 1 - A 256k x 16 bit EPROM / FlashROM adapter for Amiga

Finally I had a little time to complete the long awaited 16 bit Kickstart EPROM / FlashROM adapter card on a PCB. There is no much to say about it, look at the pictures below.

Saturday, June 6, 2015

Amiga 500 68HC000 @ 14 MHz accelerator (phase 1)

A new month, a new project. This is the first phase of the 68k (maybe 020, 030 later?) accelerator card for the Amiga 500.

The roadmap is:

  1. Getting the bus from the motherboard CPU
  2. Resolving the E clock issue, as the MB CPU always generates the E clock, even when it is not a bus master
  3. Designing an external 7 MHz CPU board, with asynchronous CIA access (using the MB E clock)
  4. Accelerating the system to 14 MHz (sync mode) or 16 MHz (async mode) 
  5. Fixing the DTACK issue when accessing the amiga bus (chips)
  6. Adding own dynamic RAM running at 14/16 MHz
Steps 1-4 are complete, the system is running stable at 14 MHz. As the program is running from the Amiga's RAM, the speedup is very tiny (cca. 12%) as visible on the screenshot below.

Like my other projects, this card is also built on a home made 2 layer PCB:

And some CPU measurements at 7 and 14 MHz:
7 MHz normal CPU cycle (7M clock, /AS, /DTACK)
14 MHz CPU cycle with unmodified /DTACK (14M clock, /AS, /DTACK)
14 MHz CPU cycle with delayed /DTACK (14M clock, original /DTACK, delayed /DTACK, /AS)
Kefmania running at 14 MHz

Powerpacker measurements also confirm the 12-13% speedup, as expected.

More details are coming soon. Stay tuned! :)

Thursday, May 7, 2015

CFRAM 500 rev. 2 - Homebrew IDE / RAM card for Amiga 500

CFRAM 500 rev. 2 expander card for Amiga 500.

It has the same functionality as rev. 1. An extra feature is the NMI button to support freezers, like HRTMon etc.

The PCB is hand routed for better quality and more compact size. It is home made as always ;)

Full feature list:
  • 8 MB Fast RAM (one 72 pin SIMM module)
  • IDE connector (HDD and ATA CD ROM  support)
  • Master / slave jumper
  • Integrated CF card slot
  • Flashable Kickstart ROM, with enable / disable jumper
  • NMI button (support for various software freezers, like HRTMon etc.).

Thursday, April 30, 2015

ECS scandoubler for A500 / A2000

A homebrew scandoubler project. It is bug free, supports DPMS energy saving and PAL / NTSC screenmodes. It fits into A500 and A2000 perfectly.

The logic is realized with a Xilinx XC95144XL CPLD. The video DAC is a ADV101 from Analog Devices.

On the pictures below You can see how the rev. 3 is fitting in an Amiga 500.

And the rev 4. in Amiga 2000. Needless to say, both prototypes are working properly.

Rev. 4 PCB preview
More pictures

CFRAM 500 rev. 1 - Homebrew IDE / RAM card for Amiga 500

This is my latest homebrew expander card for the Amiga 500.Quick feature list:

-8 MB Autoconfig Fast RAM
-Integrated CF card slot (master / slave jumper)
-IDE connector
-IDE CD ROM support
-Gayle style IDE, with autoboot feature (A600 / A1200 compatible)
-Flashable Kickstart ROM (with enable / disable jumper)